Improving power electronics | Deep insight E-Mobility Engineering | November/December 2023 59 parameter variations among the IGBTs to ±0.5 V. This provides stability when operating IGBTs in parallel, and means the modules do not have to be overdesigned to accommodate device variations; they can also be used as a bare die in a module or in an inverter design, saving space. The devices have a withstand voltage of 750 V with currents of 220-300 A for 400 V battery packs, and a withstand voltage of 1200 V and currents of 150200 A for 800 V packs. This is 10% higher currents than previous devices in a smaller die size of 100 mm2 for the largest 300 A part. They all have an operating junction temperature range from -40 to 175 oC, allowing for higher temperatures in the inverter. As a measure of the robustness, the reverse bias safe operating area has a maximum current pulse of 600 A at the highest 175 oC junction temperature, and a highly robust short-circuit withstand time of 4 µs at 400 V. There are a number of design enhancements to boost efficiency. The first is an increase in the saturation voltage to 1.3 V as well as a 50% reduction in the temperature dependence of gate resistance. This minimises switching losses at high temperatures, spike voltage at low temperatures and the short-circuit withstand time, supporting highperformance designs. These advances reduce the inverter power losses, improving power efficiency by up to 6% compared to the current AE4 process at the same current density, allowing EVs to drive longer distances or use fewer batteries. The AE5s have been used in a hardware reference design that combines the IGBT, microcontroller, power management IC, gate driver IC and fast recovery diode for an inverter. SiC SiC MOSFETs are built from numerous transistor cells arrayed side by side. To reduce overall device resistivity, the resistance of each cell must be reduced. This is driving a move from today’s planar architecture, where the p-n-p junction of the MOSFET is lateral on the SiC wafer, to a trench design where the n, p and n layers are stacked vertically. This allows a denser array of cells but has created problems with insulation around the gate breaking down at high voltages. To tackle this, one company, Mitsubishi, has developed an electric field-limiting structure based on advanced simulations carried out during the design stage. Reducing the electric field applied to the gate insulating film to that of a conventional planar-type level enables the film to achieve greater reliability at high voltage. This reduces the on-resistance by half, reducing heat generation and allowing the use of a smaller cooling device for energy savings and miniaturisation. The electric field-limiting structure ensures device reliability by controlling current flowing through the semiconductor layer between the drain and source electrodes by applying a voltage to the gate electrode. To achieve control using a small voltage, a thin gate-insulating film is required. If a high voltage is applied in a countries over the past 3 years to boost the voltage, reliability and robustness of the transistors for transport and heavy industrial applications such as battery systems and chargers for EVs. For those, the development boosts the efficiency of the devices to 98% with a 200 oC junction temperature, taking on SiC directly. At the same time, the development improves IGBT lifetimes by 50% and cuts the cost of a drivetrain inverter by a third, with 10% lower losses. A follow-on project, called PowerizeD, is working on making the power electronics designs more digital. Renesas Electronics has also developed a new generation of IGBTs that reduce their size and power losses. Its AE5-generation chips are built on larger, 300 mm wafers and achieve a 10% reduction in power losses compared to the current-generation AE4 devices, a power saving that will help EV developers increase the efficiency of the power electronics to increase EV ranges. The devices are about 10% smaller than before while still maintaining high levels of robustness. Their design also improves performance and safety as modules by minimising SiC power transistors on a wafer (Courtesy of Infineon)
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